” 辅导program编程语言、 写作Python，Java编程Lab 2: Simple Data PathDue Sunday 1 November 2020, 11:59 PMMinimum Submission Requirements● Ensure that your Lab2 folder contains the following files (note thecapitalization convention):○ Lab2.lgi (you may need to rename your extension from .LGI to .lgi)○ README.txt● Commit and Push your repository● Completed Google Form with the correct commit ID of your final submissionObjectiveThe objective of this lab is to build a sequential logic circuit and introduce datapaths.DescriptionA data path is the path by which data flows in a system. In this lab, you willimplement a simple data path with a register file, ALU, and user inputs.Each processor Contains a register file that holds the registers used in programexecution. Registers are fast access local variables that can change after everyinstruction.In this lab, you will be building a register file that contains four, 4-bitregisters. Each of the four registers has an address (0b00 – 0b11) and stores a4-bit value.The value saved to a destination register (write register) will be chosen from one oftwo sources, the Keypad user input, or the output of the ALU. The ALU in this systemis a 4-bit bitwise left arithmetic shift circuit that takes two of the registervalues as inputs (read registers). You may not use the MML library ALU and shouldinstead build one out of muxes or logic gates.From the user interface, the user will select the data source (source select) and theaddresses of the read and write registers.A usage example is demonstrated in the Appendix.ResourcesLeft Arithmetic Shift Operation, Lecture 7MultiplexersRegisters, Flip-Flops, and Modular DesignLab 2 Page 1 of 11 Spring 2020 2020, Computer Science and Engineering Department, University of California – Santa CruzSpecificationTemplateBuild your lab starting with the template file provided. The template file containsthe user interface. DO NOT MODIFY THE FIRST PAGE except for your name andCruzID (NOT your student ID number).Additional wires and logic circuits shall be drawn on subsequent pages. There areplaceholder signal senders and receivers on the second page that you can use. You mayremove these senders and receivers from the second page as you use them in yourdesign. You are Free to modify the template from the second page and add more pages.You are encouraged to add middle values to break a complicated circuit to severalparts and add meaningful names to circuits to make them readable like the first page.Remember to rename the template file to Lab2.lgi.Figure: Lab 2 TemplateLab 2 Page 2 of 11 Spring 2020 2020, Computer Science and Engineering Department, University of California – Santa CruzUser InterfaceInputsClear Resets all registers to 0, normally offUpdate Register Stores the appropriate value to the destination registerindicated by The Write Register Address. This is like theclock for the register file.Read Register 1Address andRead Register 2AddressAddresses of source registers to ALUWrite Address Address of destination registerKeypad User input value, this value will be stored directly to theregister indicated by the write address register if Store Selectis 0.OutputsRegister # Value 4-bit raw value stored in registerKeypad Output Value selected from keypadALU Input 1 andALU Input 2Value of the registers addressed by Read Register 1 Address andRead Register 2 Address, respectivelyALU Output Result of the ALU computation; bitwise left arithmetic shift ofALU Input 2 by the amount in ALU input 1Flip-FlopsFor the register, use D flip-flops, and makesure they are edge triggered with a clear line.For your convenience, here is a tabulardescription of how flip-flop with clear lineworks. You may also find practice_flipflop.lgihandy for understanding how flip-flops set andreset.Examples of how to hook up the D flip-flop isincluded in practice_flipflop.lgi. This filecan be found here.Lab 2 Page 3 of 11 Spring 2020 2020, Computer Science and Engineering Department, University of California – Santa CruzFigure: Flip-flop Usage ExampleTop LevelHere is a top-level functional block diagram of the overall design. You do not needto follow this Design exactly if you discover another way to meet the specification.Figure: Top Level DiagramDocumentation Standards (README.txt)Follow the documentation guidelines found here. Refer to the sections on the READMEand Schematic visual structure. Diagram.pdf is not required for this lab.Lab 2 Page 4 of 11 Spring 2020 2020, Computer Science and Engineering Department, University of California – Santa CruzSimulationTo ensure the circuit simulates without error, make sure there is at least onereceiver for every sender and that each receiver has exactlyone sender. In addition, do not modify the canvas size.If you do not have at least one receiver for every sender or if you have more thanone sender with the same name, your circuit will not simulate and you will losepoints.Google FormYou are required to answer questions about the lab in this Google Form:Google FormMissing Wire Best PracticesMML has a known bug which causes some wires to disappear during the saveprocess. To reduce the likelihood of this occurring, DO NOT use theNode tool (its a black dot located at the top-right of the toolpalette). This tool is particularly vulnerable to the bug.If this bug occurs, the grader will attempt to repair the missing wirein your file. This is only possible if your circuit isvery readable. Make sure that wires do not cross wheneverpossible. Wire paths should be short and direct. Use senders andreceivers liberally.Lab 2 Page 5 of 11 Spring 2020 2020, Computer Science and Engineering Department, University of California – Santa CruzGrading Rubric (total 70 points)10 pt simulates without errors25 pt register file functionality4 pt clear button works4 pt register design5 pt update button works12 pt Write register select logic20 pt other functionality3 pt ALU input 1 reads correct register3 pt ALU input 2 reads correct register6 pt ALU performs bitwise left arithmetic shift (doesnt use MML library ALU)8 pt correct value saved15 pt documentation3 pt complete header comments on every page of schematic3 pt useful sufficient comments3 pt clean visual structure / use of white space3 pt README file complete3 pt Google form complete with at least 150 words-15 pt if first page of Template is modified, or if the template isnt used properly-15 pt incorrect naming convention (e.g .LGI or lab2.lgi)-40 pt incorrect ALU functionLab 2 Page 6 of 11 Spring 2020 2020, Computer Science and Engineering Department, University of California – Santa CruzAppendixUsage Example1. Select simulate.2. Press Clear Registers to reset all register values to 0.Lab 2 Page 7 of 11 Spring 2020 2020, Computer Science and Engineering Department, University of California – Santa Cruz3. Select the following inputs to store the number 6 to register 3:Store Select: 0Keypad: 6Read Register Address 1: x (dont care)Read Register Address 2: xWrite Register Address: 34. Press Update Register to save the keypad input to the destination register.Lab 2 Page 8 of 11 Spring 2020 2020, Computer Science and Engineering Department, University of California – Santa Cruz5. Select the following inputs to store the number 2 to register 0:Store Select: 0Keypad: 2Read Register Address 1: xRead Register Address 2: xWrite Register Address: 06. Press Update Register to save the keypad input to the destination register.Lab 2 Page 9 of 11 Spring 2020 2020, Computer Science and Engineering Department, University of California – Santa Cruz7. Select The following inputs to store the number 7 to register 1:Store Select: 0Keypad: 7Read Register Address 1: xRead Register Address 2: xWrite Register Address: 18. Press Update Register to save the keypad input to the destination register.Lab 2 Page 10 of 11 Spring 2020 2020, Computer Science and Engineering Department, University of California – Santa Cruz9. Select The following to store the rotation of registers 1 and 2 to register 0:Store Select: 1Keypad: xRead Register Address 1: 0Read Register Address 2: 1Write Register Address: 210. Press Update Register to save the ALU output to the destination register.Lab 2 Page 11 of 11 Spring 2020 2020, Computer Science and Engineering Department, University of California – Santa Cruz如有需要，请加QQ：99515681 或邮箱：99515681@qq.com
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